1. Field of the Invention
The present invention relates to a reference voltage generating circuit used for various LSI circuits and the like.
2. Description of the Prior Art
FIG. 3 shows an equivalent circuit 100 of a prior art reference voltage generating circuit formed on a semiconductor substrate. The construction of this circuit is such that two diodes Q3 and Q4, each constructed from a transistor with its base and collector shorted, are respectively provided with emitters of different area sizes, thereby generating a band-gap voltage .DELTA.V.sub.BE which is then amplified by a DC amplifier OP2, an operational amplifier, to generate a reference voltage V.sub.ref. In FIG. 3, R7 and R8 indicate resistors.
In the above equivant reference voltage generating circuit 100, when the emitter area of the diode Q3 is denoted as A.sub.1 (not shown) and the emitter area of the diode Q4 as A.sub.2 (not shown), the band-gap voltage .DELTA.V.sub.BE can be expressed by Equation 1 given below. The circuit 100 is so configured that the current I.sub.f that flows from the output to the inverting input of the DC amplifier OP2 through the resistor R7 satisfies the relationship I.sub.o &gt;I.sub.f with respect to the input current I.sub.o. ##EQU1## k=Boltzmann's constant T=Absolute temperature
g=Amount of electron charge
The reference voltage V.sub.ref output from the DC amplifier OP2 is expressed by the following Equation 2: ##EQU2## where V.sub.BE3 is the value of the voltage applied from the diode Q3 to the non-inverting input of the DC amplifier OP2, Re and Rf are the resistance values of the resistors R7 and R8, and Re/Rf represents the gain of the DC amplifier OP2.
As can be seen from Equation 2, the reference voltage V.sub.ref is generated by using the band-gap voltage .DELTA.V.sub.BE.
There are, however, drawbacks associated with the above type of prior art reference voltage circuit. In the above prior art reference voltage circuit, if, for example, 3.3 V is to be obtained as the reference voltage V.sub.ref, assuming that the emitter area ratio A.sub.2 /A.sub.1 is 10/1, the band-gap voltage .DELTA.V.sub.BE will be approximately 60 mV from Equation 1. Re/Rf, expressed by the following Equation 3 obtained by transforming Equation 2, will be 44. This means that the DC amplifier OP2 will be required to have a gain Re/Rf of 44. ##EQU3##
In this situation, if it is assumed that 10 mV is generated as an offset voltage V.sub.offset for the DC amplifier OP2, for example, an error voltage .DELTA.V.sub.ref (expressed by the following Equation 4) of 0.44 V will occur to the reference voltage V.sub.ref due to the offset voltage V.sub.offset. ##EQU4##
If the gain Re/Rf of the DC amplifier OP2 is to be reduced in order to reduce the error voltage .DELTA.V.sub.ref, one common approach would be to increase the band-gap voltage .DELTA.VBE by increasing the emitter area ratio A.sub.2 /A.sub.1.
However, even if the emitter area ratio A.sub.2 /A.sub.1 is increased ten-fold to 100, the band-gap voltage .DELTA.V.sub.BE can only be increased by a factor of two to 120 mV, which means that the gain Re/Rf of the DC amplifier OP2 can only be reduced by half to 22. Furthermore, the increase in the emitter area ratio A.sub.2 /A.sub.1 will lead to an increase in errors in terms of electrical characteristics as will appreciated by those having ordinary skill in the art.
The present invention aims to overcome the above problems in the prior art, and an object of the invention is to provide a reference voltage generating circuit wherein, when generating the reference voltage, the amplifying gain is reduced, thereby reducing the susceptibility to the effect of the offset voltage.